The present invention relates to a semiconductor memory and a data read method of the same.
With the recent development of high-performance LSIs, it is being required to increase the operation speed of SRAMs incorporated into these LSIs.
An SRAM has memory cells arranged in a matrix. Each memory cell is connected to a word line running in the row direction, and is also connected to a pair of bit lines running along the column direction. The memory cell stores a pair of data.
To read out data from the memory cell, the pair of bit lines are charged in advance (i.e., precharged) to change their electric potentials to “H” level.
When the word line is activated by changing its electric potential to “H” level, the two data held in the memory cell are read out to the pair of bit lines.
A bit line to which data “0” is read out is discharged from “H” level to “L” level. A bit line to which data “1” is read out maintains “H” level without being discharged.
After that, signals corresponding to the potential levels detected from these bit lines are output, thereby reading out the data held in the memory cell.
When the data are thus read out from the memory cell, the electric potential of the word line is changed to “L” level, and the bit line whose electric potential has changed to “L” level is charged. In this manner, the electric potentials of both the pair of bit lines are set at “H” level.
As described above, a time for charging a bit line must be ensured after data are read out from a memory cell as an object of data read and before data are read out from a memory cell as an object of next data read. This makes it impossible to increase the operation speed of an SRAM.
Also, whenever data are read out from a memory cell, a bit line whose electric potential has changed to “L” level must be charged. This increases the power consumption.